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@ -61,7 +61,7 @@ namespace nv {
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#elif POSH_CPU_STRONGARM || POSH_CPU_AARCH64
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// need more specific cpu type for armv7?
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// also utilizes a full barrier
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// currently treating laod like x86 - this could be wrong
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// currently treating load like x86 - this could be wrong
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// this is the easiest but slowest way to do this
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nvCompilerReadWriteBarrier();
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@ -78,6 +78,16 @@ namespace nv {
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uint32 ret = *ptr; // replace with ldrex?
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nvCompilerReadWriteBarrier();
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return ret;
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#elif POSH_CPU_E2K
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// need more specific cpu type for e2k?
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// also utilizes a full barrier
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// currently treating load like x86 - this could be wrong
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// this is the easiest but slowest way to do this
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nvCompilerReadWriteBarrier();
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uint32 ret = *ptr; // replace with ldrex?
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nvCompilerReadWriteBarrier();
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return ret;
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#else
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#error "Not implemented"
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#endif
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@ -102,6 +112,11 @@ namespace nv {
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nvCompilerReadWriteBarrier();
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*ptr = value; //strex?
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nvCompilerReadWriteBarrier();
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#elif POSH_CPU_E2K
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// this is the easiest but slowest way to do this
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nvCompilerReadWriteBarrier();
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*ptr = value; //strex?
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nvCompilerReadWriteBarrier();
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#else
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#error "Atomics not implemented."
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#endif
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