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325 lines
8.7 KiB
C++
325 lines
8.7 KiB
C++
/*
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Copyright 2007 nVidia, Inc.
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Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License.
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You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and limitations under the License.
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*/
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// Utility and common routines
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#include "zoh_utils.h"
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#include "nvmath/Vector.inl"
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#include <math.h>
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using namespace nv;
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using namespace ZOH;
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static const int denom7_weights_64[] = {0, 9, 18, 27, 37, 46, 55, 64}; // divided by 64
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static const int denom15_weights_64[] = {0, 4, 9, 13, 17, 21, 26, 30, 34, 38, 43, 47, 51, 55, 60, 64}; // divided by 64
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/*static*/ Format Utils::FORMAT;
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int Utils::lerp(int a, int b, int i, int denom)
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{
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nvDebugCheck (denom == 3 || denom == 7 || denom == 15);
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nvDebugCheck (i >= 0 && i <= denom);
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int round = 32, shift = 6;
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const int *weights;
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switch(denom)
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{
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case 3: denom *= 5; i *= 5; // fall through to case 15
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case 15: weights = denom15_weights_64; break;
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case 7: weights = denom7_weights_64; break;
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default: nvDebugCheck(0);
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}
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return (a*weights[denom-i] +b*weights[i] + round) >> shift;
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}
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Vector3 Utils::lerp(const Vector3& a, const Vector3 &b, int i, int denom)
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{
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nvDebugCheck (denom == 3 || denom == 7 || denom == 15);
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nvDebugCheck (i >= 0 && i <= denom);
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int shift = 6;
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const int *weights;
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switch(denom)
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{
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case 3: denom *= 5; i *= 5; // fall through to case 15
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case 15: weights = denom15_weights_64; break;
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case 7: weights = denom7_weights_64; break;
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default: nvUnreachable();
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}
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// no need to round these as this is an exact division
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return (a*float(weights[denom-i]) +b*float(weights[i])) / float(1 << shift);
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}
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/*
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For unsigned f16, clamp the input to [0,F16MAX]. Thus u15.
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For signed f16, clamp the input to [-F16MAX,F16MAX]. Thus s16.
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The conversions proceed as follows:
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unsigned f16: get bits. if high bit set, clamp to 0, else clamp to F16MAX.
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signed f16: get bits. extract exp+mantissa and clamp to F16MAX. return -value if sign bit was set, else value
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unsigned int: get bits. return as a positive value.
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signed int. get bits. return as a value in -32768..32767.
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The inverse conversions are just the inverse of the above.
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*/
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// clamp the 3 channels of the input vector to the allowable range based on FORMAT
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// note that each channel is a float storing the allowable range as a bit pattern converted to float
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// that is, for unsigned f16 say, we would clamp each channel to the range [0, F16MAX]
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void Utils::clamp(Vector3 &v)
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{
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for (int i=0; i<3; ++i)
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{
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switch(Utils::FORMAT)
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{
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case UNSIGNED_F16:
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if (v.component[i] < 0.0) v.component[i] = 0;
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else if (v.component[i] > F16MAX) v.component[i] = F16MAX;
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break;
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case SIGNED_F16:
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if (v.component[i] < -F16MAX) v.component[i] = -F16MAX;
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else if (v.component[i] > F16MAX) v.component[i] = F16MAX;
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break;
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default:
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nvUnreachable();
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}
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}
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}
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// convert a u16 value to s17 (represented as an int) based on the format expected
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int Utils::ushort_to_format(unsigned short input)
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{
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int out, s;
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// clamp to the valid range we are expecting
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switch (Utils::FORMAT)
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{
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case UNSIGNED_F16:
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if (input & F16S_MASK) out = 0;
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else if (input > F16MAX) out = F16MAX;
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else out = input;
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break;
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case SIGNED_F16:
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s = input & F16S_MASK;
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input &= F16EM_MASK;
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if (input > F16MAX) out = F16MAX;
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else out = input;
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out = s ? -out : out;
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break;
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}
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return out;
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}
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// convert a s17 value to u16 based on the format expected
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unsigned short Utils::format_to_ushort(int input)
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{
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unsigned short out;
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// clamp to the valid range we are expecting
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switch (Utils::FORMAT)
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{
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case UNSIGNED_F16:
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nvDebugCheck (input >= 0 && input <= F16MAX);
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out = input;
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break;
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case SIGNED_F16:
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nvDebugCheck (input >= -F16MAX && input <= F16MAX);
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// convert to sign-magnitude
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int s;
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if (input < 0) { s = F16S_MASK; input = -input; }
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else { s = 0; }
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out = s | input;
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break;
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}
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return out;
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}
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// quantize the input range into equal-sized bins
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int Utils::quantize(float value, int prec)
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{
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int q, ivalue, s;
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nvDebugCheck (prec > 1); // didn't bother to make it work for 1
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value = (float)floor(value + 0.5);
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int bias = (prec > 10) ? ((1<<(prec-1))-1) : 0; // bias precisions 11..16 to get a more accurate quantization
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switch (Utils::FORMAT)
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{
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case UNSIGNED_F16:
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nvDebugCheck (value >= 0 && value <= F16MAX);
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ivalue = (int)value;
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q = ((ivalue << prec) + bias) / (F16MAX+1);
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nvDebugCheck (q >= 0 && q < (1 << prec));
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break;
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case SIGNED_F16:
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nvDebugCheck (value >= -F16MAX && value <= F16MAX);
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// convert to sign-magnitude
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ivalue = (int)value;
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if (ivalue < 0) { s = 1; ivalue = -ivalue; } else s = 0;
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q = ((ivalue << (prec-1)) + bias) / (F16MAX+1);
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if (s)
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q = -q;
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nvDebugCheck (q > -(1 << (prec-1)) && q < (1 << (prec-1)));
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break;
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}
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return q;
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}
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int Utils::finish_unquantize(int q, int prec)
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{
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if (Utils::FORMAT == UNSIGNED_F16)
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return (q * 31) >> 6; // scale the magnitude by 31/64
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else if (Utils::FORMAT == SIGNED_F16)
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return (q < 0) ? -(((-q) * 31) >> 5) : (q * 31) >> 5; // scale the magnitude by 31/32
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else
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return q;
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}
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// unquantize each bin to midpoint of original bin range, except
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// for the end bins which we push to an endpoint of the bin range.
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// we do this to ensure we can represent all possible original values.
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// the asymmetric end bins do not affect PSNR for the test images.
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//
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// code this function assuming an arbitrary bit pattern as the encoded block
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int Utils::unquantize(int q, int prec)
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{
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int unq, s;
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nvDebugCheck (prec > 1); // not implemented for prec 1
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switch (Utils::FORMAT)
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{
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// modify this case to move the multiplication by 31 after interpolation.
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// Need to use finish_unquantize.
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// since we have 16 bits available, let's unquantize this to 16 bits unsigned
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// thus the scale factor is [0-7c00)/[0-10000) = 31/64
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case UNSIGNED_F16:
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if (prec >= 15)
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unq = q;
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else if (q == 0)
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unq = 0;
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else if (q == ((1<<prec)-1))
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unq = U16MAX;
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else
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unq = (q * (U16MAX+1) + (U16MAX+1)/2) >> prec;
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break;
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// here, let's stick with S16 (no apparent quality benefit from going to S17)
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// range is (-7c00..7c00)/(-8000..8000) = 31/32
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case SIGNED_F16:
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// don't remove this test even though it appears equivalent to the code below
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// as it isn't -- the code below can overflow for prec = 16
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if (prec >= 16)
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unq = q;
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else
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{
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if (q < 0) { s = 1; q = -q; } else s = 0;
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if (q == 0)
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unq = 0;
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else if (q >= ((1<<(prec-1))-1))
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unq = s ? -S16MAX : S16MAX;
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else
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{
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unq = (q * (S16MAX+1) + (S16MAX+1)/2) >> (prec-1);
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if (s)
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unq = -unq;
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}
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}
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break;
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}
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return unq;
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}
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// pick a norm!
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#define NORM_EUCLIDEAN 1
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float Utils::norm(const Vector3 &a, const Vector3 &b)
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{
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#ifdef NORM_EUCLIDEAN
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return lengthSquared(a - b);
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#endif
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#ifdef NORM_ABS
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Vector3 err = a - b;
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return fabs(err.x) + fabs(err.y) + fabs(err.z);
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#endif
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}
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// parse <name>[<start>{:<end>}]{,}
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// the pointer starts here ^
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// name is 1 or 2 chars and matches field names. start and end are decimal numbers
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void Utils::parse(const char *encoding, int &ptr, Field &field, int &endbit, int &len)
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{
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if (ptr <= 0) return;
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--ptr;
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if (encoding[ptr] == ',') --ptr;
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nvDebugCheck (encoding[ptr] == ']');
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--ptr;
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endbit = 0;
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int scale = 1;
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while (encoding[ptr] != ':' && encoding[ptr] != '[')
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{
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nvDebugCheck(encoding[ptr] >= '0' && encoding[ptr] <= '9');
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endbit += (encoding[ptr--] - '0') * scale;
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scale *= 10;
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}
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int startbit = 0; scale = 1;
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if (encoding[ptr] == '[')
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startbit = endbit;
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else
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{
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ptr--;
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while (encoding[ptr] != '[')
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{
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nvDebugCheck(encoding[ptr] >= '0' && encoding[ptr] <= '9');
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startbit += (encoding[ptr--] - '0') * scale;
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scale *= 10;
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}
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}
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len = startbit - endbit + 1; // startbit>=endbit note
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--ptr;
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if (encoding[ptr] == 'm') field = FIELD_M;
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else if (encoding[ptr] == 'd') field = FIELD_D;
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else {
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// it's wxyz
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nvDebugCheck (encoding[ptr] >= 'w' && encoding[ptr] <= 'z');
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int foo = encoding[ptr--] - 'w';
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// now it is r g or b
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if (encoding[ptr] == 'r') foo += 10;
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else if (encoding[ptr] == 'g') foo += 20;
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else if (encoding[ptr] == 'b') foo += 30;
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else nvDebugCheck(0);
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field = (Field) foo;
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}
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}
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