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@ -30,6 +30,12 @@ extern "C"
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#endif // NV_CC_MSVC
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#if NV_CC_CLANG && POSH_CPU_STRONGARM
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// LLVM/Clang do not yet have functioning atomics as of 2.1
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// #include <atomic>
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#endif
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namespace nv {
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@ -46,6 +52,16 @@ namespace nv {
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uint32 ret = *ptr; // on x86, loads are Acquire
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nvCompilerReadBarrier();
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return ret;
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#elif POSH_CPU_STRONGARM
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// need more specific cpu type for armv7?
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// also utilizes a full barrier
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// currently treating laod like x86 - this could be wrong
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// this is the easiest but slowest way to do this
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nvCompilerReadWriteBarrier();
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uint32 ret = *ptr; // replace with ldrex?
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nvCompilerReadWriteBarrier();
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return ret;
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#else
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#error "Not implemented"
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#endif
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@ -60,6 +76,11 @@ namespace nv {
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nvCompilerWriteBarrier();
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*ptr = value; // on x86, stores are Release
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nvCompilerWriteBarrier();
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#elif POSH_CPU_STRONGARM
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// this is the easiest but slowest way to do this
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nvCompilerReadWriteBarrier();
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*ptr = value; //strex?
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nvCompilerReadWriteBarrier();
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#else
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#error "Atomics not implemented."
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#endif
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@ -84,6 +105,57 @@ namespace nv {
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return (uint32)_InterlockedDecrement((long *)value);
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}
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#elif NV_CC_CLANG && POSH_CPU_STRONGARM
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NV_COMPILER_CHECK(sizeof(uint32) == sizeof(long));
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inline uint32 atomicIncrement(uint32 * value)
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{
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nvDebugCheck((intptr_t(value) & 3) == 0);
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// this should work in LLVM eventually, but not as of 2.1
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// return (uint32)AtomicIncrement((long *)value);
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// in the mean time,
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register uint32 result;
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asm volatile (
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"1: ldrexb %0, [%1] \n\t"
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"add %0, %0, #1 \n\t"
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"strexb r1, %0, [%1] \n\t"
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"cmp r1, #0 \n\t"
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"bne 1b"
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: "=&r" (result)
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: "r"(value)
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: "r1"
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);
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return result;
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}
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inline uint32 atomicDecrement(uint32 * value)
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{
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nvDebugCheck((intptr_t(value) & 3) == 0);
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// this should work in LLVM eventually, but not as of 2.1:
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// return (uint32)sys::AtomicDecrement((long *)value);
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// in the mean time,
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register uint32 result;
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asm volatile (
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"1: ldrexb %0, [%1] \n\t"
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"sub %0, %0, #1 \n\t"
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"strexb r1, %0, [%1] \n\t"
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"cmp r1, #0 \n\t"
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"bne 1b"
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: "=&r" (result)
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: "r"(value)
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: "r1"
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);
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return result;
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}
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#elif NV_CC_GNUC
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// Many alternative implementations at:
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// http://www.memoryhole.net/kyle/2007/05/atomic_incrementing.html
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@ -103,6 +175,7 @@ namespace nv {
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}
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#else
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#error "Atomics not implemented."
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#endif
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