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Apply patch provided in issue #224. Add support for ARM64.

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This commit is contained in:
Ignacio
2015-07-20 23:47:01 +02:00
parent 4ef408b591
commit 58617584d4
4 changed files with 14 additions and 3 deletions
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4
src/nvthread/Atomic.h
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@ -58,7 +58,7 @@ namespace nv {
uint32 ret = *ptr; // on x86, loads are Acquire
nvCompilerReadBarrier();
return ret;
#elif POSH_CPU_STRONGARM
#elif POSH_CPU_STRONGARM || POSH_CPU_AARCH64
// need more specific cpu type for armv7?
// also utilizes a full barrier
// currently treating laod like x86 - this could be wrong
@ -82,7 +82,7 @@ namespace nv {
nvCompilerWriteBarrier();
*ptr = value; // on x86, stores are Release
//nvCompilerWriteBarrier(); // @@ IC: Where does this barrier go? In nvtt it was after, in Witness before. Not sure which one is right.
#elif POSH_CPU_STRONGARM
#elif POSH_CPU_STRONGARM || POSH_CPU_AARCH64
// this is the easiest but slowest way to do this
nvCompilerReadWriteBarrier();
*ptr = value; //strex?