Fix build on OSX 10.5. Solves issue 44.
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@ -177,24 +177,36 @@ namespace
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static void * callerAddress(void * secret)
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{
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# if NV_OS_DARWIN && NV_CPU_PPC
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ucontext_t * ucp = (ucontext_t *)secret;
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return (void *) ucp->uc_mcontext->ss.srr0;
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# elif NV_OS_DARWIN && NV_CPU_X86
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ucontext_t * ucp = (ucontext_t *)secret;
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return (void *) ucp->uc_mcontext->ss.eip;
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# elif NV_CPU_X86_64
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// #define REG_RIP REG_INDEX(rip) // seems to be 16
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ucontext_t * ucp = (ucontext_t *)secret;
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return (void *)ucp->uc_mcontext.gregs[REG_RIP];
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# elif NV_CPU_X86
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ucontext_t * ucp = (ucontext_t *)secret;
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return (void *)ucp->uc_mcontext.gregs[14/*REG_EIP*/];
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# elif NV_CPU_PPC
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ucontext_t * ucp = (ucontext_t *)secret;
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return (void *) ucp->uc_mcontext.regs->nip;
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# if NV_OS_DARWIN
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# if __DARWIN_UNIX03
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# if NV_CPU_PPC
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ucontext_t * ucp = (ucontext_t *)secret;
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return (void *) ucp->uc_mcontext->__ss.__srr0;
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# elif NV_CPU_X86
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ucontext_t * ucp = (ucontext_t *)secret;
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return (void *) ucp->uc_mcontext->__ss.__eip;
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# endif
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# else
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# if NV_CPU_PPC
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ucontext_t * ucp = (ucontext_t *)secret;
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return (void *) ucp->uc_mcontext->ss.srr0;
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# elif NV_CPU_X86
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ucontext_t * ucp = (ucontext_t *)secret;
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return (void *) ucp->uc_mcontext->ss.eip;
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# endif
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# endif
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# else
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return NULL;
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# if NV_CPU_X86_64
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// #define REG_RIP REG_INDEX(rip) // seems to be 16
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ucontext_t * ucp = (ucontext_t *)secret;
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return (void *)ucp->uc_mcontext.gregs[REG_RIP];
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# elif NV_CPU_X86
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ucontext_t * ucp = (ucontext_t *)secret;
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return (void *)ucp->uc_mcontext.gregs[14/*REG_EIP*/];
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# elif NV_CPU_PPC
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ucontext_t * ucp = (ucontext_t *)secret;
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return (void *) ucp->uc_mcontext.regs->nip;
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# endif
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# endif
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// How to obtain the instruction pointers in different platforms, from mlton's source code.
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