Merge pull request #238 from madscientist159/master

Fix PPC64LE builds

extern/poshlib/posh.h

@@ -451,6 +451,7 @@ LLVM:
 #  define POSH_CPU_PPC 1
 #  if !defined POSH_CPU_STRING
 #    if defined __powerpc64__
+#       define POSH_CPU_PPC64 1
 #       define POSH_CPU_STRING "PowerPC64"
 #    else
 #       define POSH_CPU_STRING "PowerPC"

src/nvcore/Debug.h

@@ -166,7 +166,7 @@ NVCORE_API void NV_CDECL nvDebugPrint( const char *msg, ... ) __attribute__((for
 namespace nv
 {
     inline bool isValidPtr(const void * ptr) {
-    #if NV_CPU_X86_64
+    #if NV_CPU_X86_64 || POSH_CPU_PPC64
         if (ptr == NULL) return true;
         if (reinterpret_cast<uint64>(ptr) < 0x10000ULL) return false;
         if (reinterpret_cast<uint64>(ptr) >= 0x000007FFFFFEFFFFULL) return false;

src/nvimage/Image.h

@@ -7,6 +7,10 @@
 #include "nvimage.h"
 #include "nvcore/Debug.h"
 
+#if NV_USE_ALTIVEC
+#undef pixel
+#endif
+
 namespace nv
 {
     class Color32;

src/nvimage/ImageIO.cpp

@@ -324,7 +324,7 @@ static bool savePPM(Stream & s, const Image * img)
     writer.writeString("255\n");
     for (uint i = 0; i < w * h; i++) {
         Color32 c = img->pixel(i);
-        s << c.r << c.g << c.b;
+        s << (uint8_t&)c.r << (uint8_t&)c.g << (uint8_t&)c.b;
     }
 
     return true;

src/nvmath/Half.cpp

@@ -489,7 +489,7 @@ nv::half_to_float( uint16 h )
 }
 
 
-#if !NV_OS_IOS //ACStodoIOS some better define to choose this?
+#if !NV_OS_IOS && (defined(__i386__) || defined(__x86_64__))
 
 #if NV_CC_GNUC
 #if defined(__i386__) || defined(__x86_64__)

src/nvmath/Plane.h

@@ -7,6 +7,10 @@
 #include "nvmath.h"
 #include "Vector.h"
 
+#if NV_USE_ALTIVEC
+#undef vector
+#endif
+
 namespace nv
 {
     class Matrix;

src/nvmath/SimdVector_VE.h

@@ -1,6 +1,7 @@
 /* -----------------------------------------------------------------------------
 
 	Copyright (c) 2006 Simon Brown                          si@sjbrown.co.uk
+	Copyright (c) 2016 Raptor Engineering, LLC
 
 	Permission is hereby granted, free of charge, to any person obtaining
 	a copy of this software and associated documentation files (the 
@@ -41,7 +42,7 @@ namespace nv {
         typedef SimdVector Arg;
 
         SimdVector() {}
-        explicit SimdVector(float v) : vec((vector float)(v)) {}	
+        explicit SimdVector(float v) : vec(vec_splats(v)) {}	
         explicit SimdVector(vector float v) : vec(v) {}
         SimdVector(const SimdVector & arg) : vec(arg.vec) {}
 
@@ -111,7 +112,7 @@ namespace nv {
 
         SimdVector& operator*=( Arg v )
         {
-            vec = vec_madd( vec, v.vec, ( vector float )( -0.0f ) );
+            vec = vec_madd( vec, v.vec, vec_splats( -0.0f ) );
             return *this;
         }
     };
@@ -128,7 +129,7 @@ namespace nv {
 
     inline SimdVector operator*( SimdVector::Arg left, SimdVector::Arg right  )
     {
-        return SimdVector( vec_madd( left.vec, right.vec, ( vector float )( -0.0f ) ) );
+        return SimdVector( vec_madd( left.vec, right.vec, vec_splats( -0.0f ) ) );
     }
 
     // Returns a*b + c
@@ -149,7 +150,7 @@ namespace nv {
         vector float estimate = vec_re( v.vec );
 
         // one round of Newton-Rhaphson refinement
-        vector float diff = vec_nmsub( estimate, v.vec, ( vector float )( 1.0f ) );
+        vector float diff = vec_nmsub( estimate, v.vec, vec_splats( 1.0f ) );
         return SimdVector( vec_madd( diff, estimate, estimate ) );
     }
 

src/nvthread/Atomic.h

@@ -63,6 +63,16 @@ namespace nv {
         // also utilizes a full barrier
         // currently treating laod like x86 - this could be wrong
         
+        // this is the easiest but slowest way to do this
+        nvCompilerReadWriteBarrier();
+		uint32 ret = *ptr; // replace with ldrex?
+        nvCompilerReadWriteBarrier();
+        return ret;
+#elif POSH_CPU_PPC64
+        // need more specific cpu type for ppc64?
+        // also utilizes a full barrier
+        // currently treating load like x86 - this could be wrong
+
         // this is the easiest but slowest way to do this
         nvCompilerReadWriteBarrier();
 		uint32 ret = *ptr; // replace with ldrex?
@@ -87,6 +97,11 @@ namespace nv {
         nvCompilerReadWriteBarrier();
 		*ptr = value; //strex?
 		nvCompilerReadWriteBarrier();
+#elif POSH_CPU_PPC64
+        // this is the easiest but slowest way to do this
+        nvCompilerReadWriteBarrier();
+		*ptr = value; //strex?
+		nvCompilerReadWriteBarrier();
 #else
 #error "Atomics not implemented."
 #endif

src/nvtt/ClusterFit.h

@@ -29,6 +29,7 @@
 
 #include "nvmath/SimdVector.h"
 #include "nvmath/Vector.h"
+#include "nvcore/Memory.h"
 
 // Use SIMD version if altivec or SSE are available.
 #define NVTT_USE_SIMD (NV_USE_ALTIVEC || NV_USE_SSE)

src/nvtt/squish/simd_ve.h

@@ -1,6 +1,7 @@
 /* -----------------------------------------------------------------------------
 
 	Copyright (c) 2006 Simon Brown                          si@sjbrown.co.uk
+	Copyright (c) 2016 Raptor Engineering, LLC
 
 	Permission is hereby granted, free of charge, to any person obtaining
 	a copy of this software and associated documentation files (the 
@@ -33,7 +34,7 @@
 
 namespace nvsquish {
 
-#define VEC4_CONST( X ) Vec4( ( vector float )( X ) )
+#define VEC4_CONST( X ) Vec4( vec_splats( (float)X ) )
 
 class Vec4
 {
@@ -105,7 +106,7 @@ public:
 	
 	Vec4& operator*=( Arg v )
 	{
-		m_v = vec_madd( m_v, v.m_v, ( vector float )( -0.0f ) );
+		m_v = vec_madd( m_v, v.m_v, vec_splats( -0.0f ) );
 		return *this;
 	}
 	
@@ -121,7 +122,7 @@ public:
 	
 	friend Vec4 operator*( Vec4::Arg left, Vec4::Arg right  )
 	{
-		return Vec4( vec_madd( left.m_v, right.m_v, ( vector float )( -0.0f ) ) );
+		return Vec4( vec_madd( left.m_v, right.m_v, vec_splats( -0.0f ) ) );
 	}
 	
 	//! Returns a*b + c
@@ -142,7 +143,7 @@ public:
 		vector float estimate = vec_re( v.m_v );
 		
 		// one round of Newton-Rhaphson refinement
-		vector float diff = vec_nmsub( estimate, v.m_v, ( vector float )( 1.0f ) );
+		vector float diff = vec_nmsub( estimate, v.m_v, vec_splats( 1.0f ) );
 		return Vec4( vec_madd( diff, estimate, estimate ) );
 	}